RegViz: Visualize GTDNSR Bitfield

Renesas Electronics /R7FA6T2BD /GPT320 /GTDNSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GTDNSR

DSGTRGBF=0, DSELCE=0, DSELCG=0, DSELCF=0, DSCBFAL=0, DSGTRGDF=0, DSGTRGBR=0, DSGTRGAF=0, DSCBRAL=0, DSCBFAH=0, DSELCD=0, DSGTRGAR=0, DSCAFBL=0, DSELCB=0, DSILVL=0000, DSELCC=0, DSELCA=0, DSELCH=0, DSCAFBH=0, DSCARBL=0, DSGTRGCR=0, DSGTRGDR=0, DSCARBH=0, DSGTRGCF=0, DSCBRAH=0

Description

General PWM Timer Down Count Source Select Register

Fields

DSGTRGAR	GTETRGA Pin Rising Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTETRGA input 1 (1): Counter count down enabled on the rising edge of GTETRGA input
DSGTRGAF	GTETRGA Pin Falling Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTETRGA input 1 (1): Counter count down enabled on the falling edge of GTETRGA input
DSGTRGBR	GTETRGB Pin Rising Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTETRGB input 1 (1): Counter count down enabled on the rising edge of GTETRGB input
DSGTRGBF	GTETRGB Pin Falling Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTETRGB input 1 (1): Counter count down enabled on the falling edge of GTETRGB input
DSGTRGCR	GTETRGC Pin Rising Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTETRGC input 1 (1): Counter count down enabled on the rising edge of GTETRGC input
DSGTRGCF	GTETRGC Pin Falling Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTETRGC input 1 (1): Counter count down enabled on the falling edge of GTETRGC input
DSGTRGDR	GTETRGD Pin Rising Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTETRGD input 1 (1): Counter count down enabled on the rising edge of GTETRGD input
DSGTRGDF	GTETRGD Pin Falling Input Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTETRGD input 1 (1): Counter count down enabled on the falling edge of GTETRGD input
DSCARBL	GTIOCnA Pin Rising Input during GTIOCnB Value Low Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 0 1 (1): Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 0
DSCARBH	GTIOCnA Pin Rising Input during GTIOCnB Value High Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTIOCnA input when GTIOCnB input is 1 1 (1): Counter count down enabled on the rising edge of GTIOCnA input when GTIOCnB input is 1
DSCAFBL	GTIOCnA Pin Falling Input during GTIOCnB Value Low Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 0 1 (1): Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 0
DSCAFBH	GTIOCnA Pin Falling Input during GTIOCnB Value High Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTIOCnA input when GTIOCnB input is 1 1 (1): Counter count down enabled on the falling edge of GTIOCnA input when GTIOCnB input is 1
DSCBRAL	GTIOCnB Pin Rising Input during GTIOCnA Value Low Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 0 1 (1): Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 0
DSCBRAH	GTIOCnB Pin Rising Input during GTIOCnA Value High Source Counter Count Down Enable 0 (0): Counter count down disabled on the rising edge of GTIOCnB input when GTIOCnA input is 1 1 (1): Counter count down enabled on the rising edge of GTIOCnB input when GTIOCnA input is 1
DSCBFAL	GTIOCnB Pin Falling Input during GTIOCnA Value Low Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 0 1 (1): Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 0
DSCBFAH	GTIOCnB Pin Falling Input during GTIOCnA Value High Source Counter Count Down Enable 0 (0): Counter count down disabled on the falling edge of GTIOCnB input when GTIOCnA input is 1 1 (1): Counter count down enabled on the falling edge of GTIOCnB input when GTIOCnA input is 1
DSELCA	ELC_GPTA Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTA input 1 (1): Counter count down enabled at the ELC_GPTA input
DSELCB	ELC_GPTB Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTB input 1 (1): Counter count down enabled at the ELC_GPTB input
DSELCC	ELC_GPTC Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTC input 1 (1): Counter count down enabled at the ELC_GPTC input
DSELCD	ELC_GPTD Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTD input 1 (1): Counter count down enabled at the ELC_GPTD input
DSELCE	ELC_GPTE Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTE input 1 (1): Counter count down enabled at the ELC_GPTE input
DSELCF	ELC_GPTF Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTF input 1 (1): Counter count down enabled at the ELC_GPTF input
DSELCG	ELC_GPTG Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTG input 1 (1): Counter count down enabled at the ELC_GPTG input
DSELCH	ELC_GPTF Event Source Counter Count Down Enable 0 (0): Counter count down disabled at the ELC_GPTF input 1 (1): Counter count down enabled at the ELC_GPTF input
DSILVL	External Input Level Source Count-Down Enable 0 (0000): Disables count-down by external input level 1 (0001): Setting prohibited 2 (0010): Enables count-down by GTIOCnA pin input level 0 3 (0011): Enables count-down by GTIOCnA pin input level 1 4 (0100): Enables count-down by GTIOCnB pin input level 0 5 (0101): Enables count-down by GTIOCnB pin input level 1 6 (0110): Setting prohibited 7 (0111): Setting prohibited 8 (1000): Enables count-down by GTETRGA pin input level 0 9 (1001): Enables count-down by GTETRGA pin input level 1 10 (1010): Enables count-down by GTETRGB pin input level 0 11 (1011): Enables count-down by GTETRGB pin input level 1 12 (1100): Enables count-down by GTETRGC pin input level 0 13 (1101): Enables count-down by GTETRGC pin input level 1 14 (1110): Enables count-down by GTETRGD pin input level 0 15 (1111): Enables count-down by GTETRGD pin input level 1

Links

() ()